This invention relates to a chip-type solid electrolytic capacitor, a lead frame used in producing the chip-type solid electrolytic capacitor, and a method of producing the chip-type solid electrolytic capacitor.
Solid electrolytic capacitors using tantalum, niobium, or the like as a valve-action metal are small in size, large in capacitance, and excellent in frequency characteristic and have thus been widely used in power circuits of CPUs and so forth. Following the recent development of portable electronic devices, reduction in size and thickness of particularly chip-type solid electrolytic capacitors has been progressed.
Such a chip-type solid electrolytic capacitor is of the surface-mount type and comprises anode and cathode terminals each having a bottom mount surface to be mounted on a circuit board and a side surface exposed on the side of the capacitor. When mounting the capacitor on the circuit board by soldering, not only the bottom mount surfaces of the terminals but also the exposed side surfaces of the terminals are quite important. The reason is that solder fillets formed on the exposed side surfaces of the terminals is observed after the soldering to thereby examine the state of the soldering at the bottom mount surfaces of the terminals. If the solder fillets are not uniformly formed on both exposed side surfaces of the terminals, the capacitor is obliquely mounted on the circuit board. Further, if the volume of the solder fillets formed on the exposed side surfaces is not sufficient, the solder excessively stays at the bottom of the capacitor, i.e. between the bottom mount surfaces of the terminals and the circuit board, so that the capacitor is forced upward away from the circuit board.
In view of this, in order to improve the formation of the solder fillets on the exposed side surfaces of the terminals, plating is applied to the exposed side surfaces thereof. This technique is described in, for example, Japanese Patent Application Publication (JP-A) No. H09-298256.
However, in the conventional technique, the plating is applied to the terminals after the capacitor has been assembled, which causes the following problems.
As a plating technique for assembled electronic components including the foregoing chip-type solid electrolytic capacitor, barrel plating is generally employed. In the barrel plating, however, orientations of the products after the plating become random so that alignment of the products is required in vertical, longitudinal, lateral, and polarity directions. This necessitates introduction of costly equipment such as a product aligning device to cause an increase in production cost. Further, this also results in longer production time. Moreover, a plating liquid may enter the inside of the products during the plating to cause deterioration in property of the products.